Note that it says maximum pixel clock is 300mhz since I'm connecting to one of the HDMI ports that maxes out at 4k@30hz.
sudo get-edid -b 5 | parse-edid
5
This is read-edid version 3.0.2. Prepare for some fun.
Attempting to use i2c interface
Only trying 5 as per your request.
256-byte EDID successfully retrieved from i2c bus 5
Looks like i2c was successful. Have a good day.
Checksum Correct
Section "Monitor"
Identifier "D50u-D1"
ModelName "D50u-D1"
VendorName "VIZ"
# Monitor Manufactured week 0 of 2015
# EDID version 1.3
# Digital Display
DisplaySize 1100 620
Gamma 2.20
Option "DPMS" "true"
Horizsync 15-80
VertRefresh 25-76
# Maximum pixel clock is 300MHz
#Not giving standard mode: 1920x1080, 60Hz
#Extension block found. Parsing...
#WARNING: I may have missed a mode (CEA mode 93)
#WARNING: I may have missed a mode (CEA mode 98)
#WARNING: I may have missed a mode (CEA mode 95)
#WARNING: I may have missed a mode (CEA mode 100)
Modeline "Mode 11" 148.50 1920 2008 2052 2200 1080 1084 1089 1125 +hsync +vsync
Modeline "Mode 0" 297.00 3840 4016 4104 4400 2160 2168 2178 2250 +hsync +vsync
Modeline "Mode 1" 148.50 1920 2008 2052 2200 1080 1084 1089 1125 +hsync +vsync
Modeline "Mode 2" 25.200 640 656 752 800 480 490 492 525 -hsync -vsync
Modeline "Mode 3" 27.027 1440 1478 1602 1716 480 484 487 525 -hsync -vsync interlace
Modeline "Mode 4" 27.027 1440 1478 1602 1716 480 484 487 525 -hsync -vsync interlace
Modeline "Mode 5" 27.027 720 736 798 858 480 489 495 525 -hsync -vsync
Modeline "Mode 6" 27.027 720 736 798 858 480 489 495 525 -hsync -vsync
Modeline "Mode 7" 74.250 1920 2008 2052 2200 1080 1082 1087 1125 +hsync +vsync interlace
Modeline "Mode 8" 148.500 1920 2008 2052 2200 1080 1084 1089 1125 +hsync +vsync
Modeline "Mode 9" 74.250 1280 1390 1420 1650 720 725 730 750 +hsync +vsync
Modeline "Mode 10" 74.250 1920 2558 2602 2750 1080 1084 1089 1125 +hsync +vsync
Modeline "Mode 12" 74.25 1280 1390 1430 1650 720 725 730 750 +hsync +vsync
Option "PreferredMode" "Mode 11"
EndSection
and I wondered what the CEA modes meant:
https://en.wikipedia.org/wiki/Extended_Display_Identification_Data
has a nice table that says that mode 100 is 4096x2160@24 for CEA mode 98.
So let's see if we can set that up.
I downloaded cvt.zip from riscosports.co.uk and compiled it with:
gcc cvt.c -o cvt -lm
and then used it to get a modeline for 4096x2160@24
./cvt
Description: This program generates video timing descriptions using formulas
from the VESA "CVT" (Coordinated Video Timing) v1.1 specification, based
itself on the earlier VESA "GTF" (Generalized Timing Formula) v1.0
specification.
usage: ./cvt x y refresh [-v|--verbose]
[-r|--reduced-blank] [-i|--interlaced]
[-f|--fbmode] [-s]|--romode] [-x|-xf86mode]
x : the desired horizontal resolution (required)
y : the desired vertical resolution (required)
refresh : the desired refresh rate (required)
-v|--verbose : enable verbose printouts (traces each step of the computation)
-r|--reduced-blank : use "Reduced Blanking" timings
-i|--interlaced : generate an Interlaced video mode
-f|--fbmode : output an fbset(8)-style mode description
-s|--romode : output an riscos-style mode description (this is the default
if no mode description is requested)
-x|-xf86mode : output an XFree86-style mode description
./cvt 4096 2160 24 -r -x
# 4096x2160 @ 24.00 Hz Reduced Blank (CVT)
# field rate 23.98 Hz; hsync: 52.40 kHz; pclk: 223.00 MHz
Modeline "4096x2160_24.00_rb" 223.00 4096 4144 4176 4256 2160 2163 2173 2185 +HSync -Vsync
xrandr --newmode "4096x2160_24.00_rb" 223.00 4096 4144 4176 4256 2160 2163 2173 2185 +HSync -Vsync
xrandr --addmode HDMI-1 "4096x2160_24.00_rb"
xrandr --output HDMI-1 --mode "4096x2160_24.00_rb"
and it works, the only thing I notice is that there is one vertical pixel line that seems a little weird in the middle, repeating a couple of pixels otherwise it looks great.. The native resolution of the TV is 3840x2160 so I would expect a few lines to be dropped.
Here's a bunch of reduced blank cvt modelines for different hz values so I don't have to fire up cvt again if I want to do a little experimenting.
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